Two's Complement Subtraction — Step by Step Guide
Learn how to perform binary subtraction using two's complement method. Step-by-step examples, reference table, and common mistakes for computer science students.
Introduction
In digital computers, subtraction is performed using addition — specifically by adding the two’s complement of the number being subtracted. This clever trick means CPUs only need an adder circuit, not a separate subtractor. Understanding two’s complement subtraction is essential for computer architecture exams, assembly language programming, and digital logic design.
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Why Use Two’s Complement for Subtraction?
Instead of building separate hardware for subtraction, computers rewrite A − B as A + (−B). In two’s complement, the negative of B is obtained by inverting all bits and adding 1. The adder circuit handles the rest.
A − B = A + (two’s complement of B)
Step-by-Step Method
To subtract B from A using two’s complement (n-bit system):
- Write both numbers in n-bit binary (pad with leading zeros)
- Find two’s complement of B: invert all bits, then add 1
- Add A + (two’s complement of B)
- If there is a carry-out (extra bit beyond n bits), discard it — the result is positive
- If there is no carry-out, the result is negative (already in two’s complement form)
Worked Example 1: 7 − 3 (8-bit)
A = 7 = 00000111 B = 3 = 00000011
Step 1: Find two’s complement of B (3)
- Invert bits: 11111100
- Add 1: 11111101 (this represents −3)
Step 2: Add A + (−B)
00000111 (7)
+ 11111101 (−3 in two's complement)
──────────
100000100
Step 3: Carry-out exists (the leading 1). Discard it. Result: 00000100 = 4 ✓ (7 − 3 = 4)
Worked Example 2: 5 − 9 (8-bit, negative result)
A = 5 = 00000101 B = 9 = 00001001
Step 1: Find two’s complement of B (9)
- Invert bits: 11110110
- Add 1: 11110111 (this represents −9)
Step 2: Add A + (−B)
00000101 (5)
+ 11110111 (−9 in two's complement)
──────────
11111100
Step 3: No carry-out. The result is negative (in two’s complement form).
To find the magnitude: take two’s complement of 11111100
- Invert: 00000011
- Add 1: 00000100 = 4
Result: −4 ✓ (5 − 9 = −4)
4-Bit Two’s Complement Reference Table
| Binary | Decimal | Binary | Decimal |
|---|---|---|---|
| 0000 | 0 | 1000 | −8 |
| 0001 | +1 | 1001 | −7 |
| 0010 | +2 | 1010 | −6 |
| 0011 | +3 | 1011 | −5 |
| 0100 | +4 | 1100 | −4 |
| 0101 | +5 | 1101 | −3 |
| 0110 | +6 | 1110 | −2 |
| 0111 | +7 | 1111 | −1 |
Range: −8 to +7 (for 4 bits). For 8 bits: −128 to +127.
Detecting Overflow
Overflow occurs when the result exceeds the representable range. Detection rule:
Overflow exists if the carry INTO the sign bit differs from the carry OUT of the sign bit.
Example (4-bit): 5 + 4 = 9, but 4-bit two’s complement max is +7 → overflow!
0101 (+5)
+ 0100 (+4)
──────
1001 (−7 in two's complement — WRONG, overflow!)
Common Mistakes
- Forgetting to pad to full bit width — Both numbers must use the same number of bits before complementing
- Not discarding carry-out correctly — A carry-out beyond n bits on a positive result must be dropped
- Misinterpreting no-carry results — If no carry-out, the answer is negative and in two’s complement form (take complement to find magnitude)
- Confusing one’s and two’s complement — One’s complement is just bit inversion; two’s complement adds 1 after inversion
- Overflow detection — If both operands have the same sign but the result has a different sign, overflow occurred
Frequently Asked Questions
Why do computers use two’s complement for subtraction?
It eliminates the need for separate subtraction hardware. The same adder circuit handles both addition and subtraction, reducing chip complexity and cost.
How do I know if the result is positive or negative?
If there is a carry-out (an extra bit beyond the n-bit width), discard it — the result is positive. If there is no carry-out, the result is negative and is in two’s complement form.
What happens with overflow in two’s complement subtraction?
If the true mathematical result exceeds the representable range (e.g., result > 127 or < −128 for 8 bits), overflow occurs. Most CPUs set an overflow flag (V flag) to signal this condition.
Can I use this method for any bit width?
Yes. The method works identically for 4-bit, 8-bit, 16-bit, 32-bit, or 64-bit systems. Just ensure both operands are padded to the same width before computing.
What is the difference between borrow-based subtraction and two’s complement subtraction?
Borrow-based subtraction works column by column (like decimal subtraction). Two’s complement converts subtraction into addition. Both give the same result, but hardware implements two’s complement because adders are simpler to build.
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Tags: binary, complement, subtraction, computer architecture
Last Updated: June 2026
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